150 lines
4.2 KiB
ArmAsm
150 lines
4.2 KiB
ArmAsm
// This file is generated from a similarly-named Perl script in the BoringSSL
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// source tree. Do not edit by hand.
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#include <ring-core/asm_base.h>
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#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__)
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#if __ARM_MAX_ARCH__>=7
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.text
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.arch armv8-a+crypto
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.globl gcm_init_clmul
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.hidden gcm_init_clmul
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.type gcm_init_clmul,%function
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.align 4
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gcm_init_clmul:
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AARCH64_VALID_CALL_TARGET
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ld1 {v17.2d},[x1] //load input H
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movi v19.16b,#0xe1
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shl v19.2d,v19.2d,#57 //0xc2.0
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ext v3.16b,v17.16b,v17.16b,#8
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ushr v18.2d,v19.2d,#63
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dup v17.4s,v17.s[1]
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ext v16.16b,v18.16b,v19.16b,#8 //t0=0xc2....01
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ushr v18.2d,v3.2d,#63
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sshr v17.4s,v17.4s,#31 //broadcast carry bit
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and v18.16b,v18.16b,v16.16b
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shl v3.2d,v3.2d,#1
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ext v18.16b,v18.16b,v18.16b,#8
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and v16.16b,v16.16b,v17.16b
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orr v3.16b,v3.16b,v18.16b //H<<<=1
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eor v20.16b,v3.16b,v16.16b //twisted H
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st1 {v20.2d},[x0],#16 //store Htable[0]
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//calculate H^2
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ext v16.16b,v20.16b,v20.16b,#8 //Karatsuba pre-processing
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pmull v0.1q,v20.1d,v20.1d
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eor v16.16b,v16.16b,v20.16b
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pmull2 v2.1q,v20.2d,v20.2d
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pmull v1.1q,v16.1d,v16.1d
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ext v17.16b,v0.16b,v2.16b,#8 //Karatsuba post-processing
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eor v18.16b,v0.16b,v2.16b
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eor v1.16b,v1.16b,v17.16b
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eor v1.16b,v1.16b,v18.16b
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pmull v18.1q,v0.1d,v19.1d //1st phase
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ins v2.d[0],v1.d[1]
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ins v1.d[1],v0.d[0]
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eor v0.16b,v1.16b,v18.16b
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ext v18.16b,v0.16b,v0.16b,#8 //2nd phase
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pmull v0.1q,v0.1d,v19.1d
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eor v18.16b,v18.16b,v2.16b
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eor v22.16b,v0.16b,v18.16b
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ext v17.16b,v22.16b,v22.16b,#8 //Karatsuba pre-processing
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eor v17.16b,v17.16b,v22.16b
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ext v21.16b,v16.16b,v17.16b,#8 //pack Karatsuba pre-processed
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st1 {v21.2d,v22.2d},[x0],#32 //store Htable[1..2]
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//calculate H^3 and H^4
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pmull v0.1q,v20.1d, v22.1d
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pmull v5.1q,v22.1d,v22.1d
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pmull2 v2.1q,v20.2d, v22.2d
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pmull2 v7.1q,v22.2d,v22.2d
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pmull v1.1q,v16.1d,v17.1d
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pmull v6.1q,v17.1d,v17.1d
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ext v16.16b,v0.16b,v2.16b,#8 //Karatsuba post-processing
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ext v17.16b,v5.16b,v7.16b,#8
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eor v18.16b,v0.16b,v2.16b
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eor v1.16b,v1.16b,v16.16b
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eor v4.16b,v5.16b,v7.16b
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eor v6.16b,v6.16b,v17.16b
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eor v1.16b,v1.16b,v18.16b
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pmull v18.1q,v0.1d,v19.1d //1st phase
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eor v6.16b,v6.16b,v4.16b
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pmull v4.1q,v5.1d,v19.1d
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ins v2.d[0],v1.d[1]
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ins v7.d[0],v6.d[1]
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ins v1.d[1],v0.d[0]
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ins v6.d[1],v5.d[0]
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eor v0.16b,v1.16b,v18.16b
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eor v5.16b,v6.16b,v4.16b
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ext v18.16b,v0.16b,v0.16b,#8 //2nd phase
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ext v4.16b,v5.16b,v5.16b,#8
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pmull v0.1q,v0.1d,v19.1d
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pmull v5.1q,v5.1d,v19.1d
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eor v18.16b,v18.16b,v2.16b
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eor v4.16b,v4.16b,v7.16b
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eor v20.16b, v0.16b,v18.16b //H^3
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eor v22.16b,v5.16b,v4.16b //H^4
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ext v16.16b,v20.16b, v20.16b,#8 //Karatsuba pre-processing
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ext v17.16b,v22.16b,v22.16b,#8
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eor v16.16b,v16.16b,v20.16b
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eor v17.16b,v17.16b,v22.16b
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ext v21.16b,v16.16b,v17.16b,#8 //pack Karatsuba pre-processed
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st1 {v20.2d,v21.2d,v22.2d},[x0] //store Htable[3..5]
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ret
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.size gcm_init_clmul,.-gcm_init_clmul
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.globl gcm_gmult_clmul
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.hidden gcm_gmult_clmul
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.type gcm_gmult_clmul,%function
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.align 4
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gcm_gmult_clmul:
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AARCH64_VALID_CALL_TARGET
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ld1 {v17.2d},[x0] //load Xi
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movi v19.16b,#0xe1
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ld1 {v20.2d,v21.2d},[x1] //load twisted H, ...
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shl v19.2d,v19.2d,#57
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#ifndef __AARCH64EB__
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rev64 v17.16b,v17.16b
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#endif
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ext v3.16b,v17.16b,v17.16b,#8
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pmull v0.1q,v20.1d,v3.1d //H.lo·Xi.lo
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eor v17.16b,v17.16b,v3.16b //Karatsuba pre-processing
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pmull2 v2.1q,v20.2d,v3.2d //H.hi·Xi.hi
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pmull v1.1q,v21.1d,v17.1d //(H.lo+H.hi)·(Xi.lo+Xi.hi)
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ext v17.16b,v0.16b,v2.16b,#8 //Karatsuba post-processing
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eor v18.16b,v0.16b,v2.16b
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eor v1.16b,v1.16b,v17.16b
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eor v1.16b,v1.16b,v18.16b
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pmull v18.1q,v0.1d,v19.1d //1st phase of reduction
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ins v2.d[0],v1.d[1]
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ins v1.d[1],v0.d[0]
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eor v0.16b,v1.16b,v18.16b
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ext v18.16b,v0.16b,v0.16b,#8 //2nd phase of reduction
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pmull v0.1q,v0.1d,v19.1d
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eor v18.16b,v18.16b,v2.16b
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eor v0.16b,v0.16b,v18.16b
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#ifndef __AARCH64EB__
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rev64 v0.16b,v0.16b
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#endif
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ext v0.16b,v0.16b,v0.16b,#8
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st1 {v0.2d},[x0] //write out Xi
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ret
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.size gcm_gmult_clmul,.-gcm_gmult_clmul
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.byte 71,72,65,83,72,32,102,111,114,32,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
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.align 2
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.align 2
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#endif
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#endif // !OPENSSL_NO_ASM && defined(OPENSSL_AARCH64) && defined(__ELF__)
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